1. Field of the Invention
This invention relates to a semiconductor integrated circuit with an output circuit for externally outputting a signal or data, and more particularly to a semiconductor integrated circuit in which a signal or data output speed can be controlled in accordance with a control signal.
2. Description of the Related Art
In an ordinary semiconductor integrated circuit such as a semiconductor memory device, a signal or data is externally supplied via an output circuit which is generally called an output buffer circuit. In general, a semiconductor memory device is designed to meet the application thereof and at the same time to attain a preset readout speed in a condition that a load capacitance of approx. 100 pF is connected to the data output terminal For example, address access time t.sub.ACC from a time that the address signal starts to vary to a time that data is read out is set to 150 ns at maximum. Further, time t.sub.OE from a time that output enable signal OE is activated to a time that output data is determined is set to approx. 70 ns at maximum.
Since it is necessary to charge or discharge the load capacitor connected to the output terminal. A large current will flow at this time, and therefore the power source voltage fluctuates, causing noise to be generated. Such a noise may cause the integrated circuit to operate erroneously. Generally, the output circuit includes a buffer amplifier section for directly driving the load, and a pre-amplifier section for driving the buffer amplifier section. In order to suppress generation of noise due to rapid variation in current flowing in the output circuit, transistors constituting the pre-amplifier section or transistors constituting the buffer amplifier section are each formed to have a small channel width in the prior art. In this way, if the channel width of the transistor of the pre-amplifier section is set to be small, the current driving ability of the transistor becomes small, thereby causing the potential of a signal supplied to the gate of the transistor of the buffer amplifier section to rise or fall slowly. Therefore, current flowing in the buffer amplifier section will not vary abruptly, suppressing the noise generation due to the fluctuation in the power source voltage. Also, when the transistor of the buffer amplifier section has a small channel width, a small amount of current flows in the buffer amplifier section. This suppresses the generation of noise due to the fluctuation in the power source voltage, thereby preventing an erroneous circuit operation of the IC. However, with these methods, the operation speed or the data readout speed will be lowered.
With the conventional method, increase in the operation speed and reduction in the noise cannot be attained at the same time. Thus, when a high-speed operation is desired, and suppression of noise is also required, a thick power-source line is used, or a large-capacitance decoupling capacitor is connected between the power source of the semiconductor integrated circuit and the ground. Use of the thick line or the large-capacitance capacitor inevitably raise the cost of the apparatus in which the integrated circuit is incorporated. Further, when the sufficient suppression of the noise in desired and the reduction of the cost of the apparatus in also required, the operation speed is lowered.
As described above, in the conventional semiconductor integrated circuit, increase in the operation speed of the output circuit and reduction in the noise cannot be attained at the same time.